择自:Intel? 64 and IA-32 Architectures
Software Developer’s Manual
Volume 2A:
Instruction Set Reference, A-M
Description
Pushes the source operand onto the FPU register stack. The source operand can be in
single-precision, double-precision, or double extended-precision floating-point
format. If the source operand is in single-precision or double-precision floating-point
format, it is automatically converted to the double extended-precision floating-point
format before being pushed on the stack.
The FLD instruction can also push the value in a selected FPU register [ST(i)] onto the
stack. Here, pushing register ST(0) duplicates the stack top.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
IF SRC is ST(i)
THEN
temp ← ST(i);
FI;
TOP ← TOP ? 1;
IF SRC is memory-operand
THEN
ST(0) ← ConvertToDoubleExtendedPrecisionFP(SRC);
ELSE (* SRC is ST(i) *)
ST(0) ← temp;
FI;
Type Length Range
-----------------------------------------------
Word Integer 16 bit -32768 to 32768
Short Integer 32 bit -2.14e9 to 2.14e9
Long Integer 64 bit -9.22e18 to 9.22e18
Single Real 32 bit 1.18e-38 to 3.40e38
Double Real 64 bit 2.23e-308 to 1.79e308
extended Real 80 bit 3.37e-1932 to 1.18e4932
Packed BCD 80 bit -1e18 to 1e18