import
csv
source
=
[]
mem_delta
=
0x01FFFBB5
reloca_foff
=
0x0000045B
reloca_size
=
0x00245940
reloca_start
=
mem_delta
+
reloca_foff
reloca_end
=
reloca_start
+
reloca_size
value_addrs
=
[]
addend_writable_addrs
=
[]
for
i
in
range
(reloca_start, reloca_end,
24
):
value_addrs.append(i
+
16
)
addend_writable_addrs.append(i
+
16
)
addend_writable_addrs.append(i
+
20
)
with
open
(
"reloc.csv"
) as f:
c
=
csv.reader(f)
c
=
list
(c)
assert
len
(c)
=
=
len
(value_addrs)
modified_value_addrs
=
[]
SP
=
0
for
(OFFSET,
TYPE
, VALUE), VALUE_ADDR
in
zip
(c, value_addrs):
if
TYPE
in
[
"R_LARCH_SOP_PUSH_PCREL"
,
"R_LARCH_SOP_PUSH_PLT_PCREL"
]:
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_PUSH_ABSOLUTE"
:
if
VALUE.startswith(
"*ABS*"
):
t1
=
VALUE_ADDR
t2
=
VALUE_ADDR
+
4
lpart
=
t1
in
modified_value_addrs
rpart
=
t2
in
modified_value_addrs
if
lpart
or
rpart:
assert
lpart
and
rpart
source.append(
f
"STK_U64_{SP} = ((uint64_t)LOC_U32_{t2:08X} << 32) | LOC_U32_{t1:08X};"
)
SP
+
=
1
else
:
if
VALUE
=
=
"*ABS*"
:
source.append(f
"STK_U64_{SP} = 0;"
)
SP
+
=
1
else
:
source.append(f
"STK_U64_{SP} = {VALUE[5:]};"
)
SP
+
=
1
elif
VALUE
in
[
"v0"
,
"v1"
,
"v2"
,
"v3"
,
"v4"
,
"v5"
,
"v6"
,
"v7"
]:
source.append(f
"STK_U64_{SP} = flag_{VALUE};"
)
SP
+
=
1
else
:
assert
False
, f
"Unknown VALUE {VALUE}"
elif
TYPE
=
=
"R_LARCH_SOP_SR"
:
SP
-
=
1
opr2
=
f
"STK_U64_{SP}"
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1} >> {opr2};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_SL"
:
SP
-
=
1
opr2
=
f
"STK_U64_{SP}"
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1} << {opr2};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_SUB"
:
SP
-
=
1
opr2
=
f
"STK_U64_{SP}"
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1} - {opr2};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_PUSH_DUP"
:
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1};"
)
SP
+
=
1
source.append(f
"STK_U64_{SP} = {opr1};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_AND"
:
SP
-
=
1
opr2
=
f
"STK_U64_{SP}"
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1} & {opr2};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_ADD"
:
SP
-
=
1
opr2
=
f
"STK_U64_{SP}"
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1} + {opr2};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_IF_ELSE"
:
SP
-
=
1
opr3
=
f
"STK_U64_{SP}"
SP
-
=
1
opr2
=
f
"STK_U64_{SP}"
SP
-
=
1
opr1
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = {opr1} ? {opr2} : {opr3};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_NOT"
:
SP
-
=
1
v
=
f
"STK_U64_{SP}"
source.append(f
"STK_U64_{SP} = !{v};"
)
SP
+
=
1
elif
TYPE
=
=
"R_LARCH_SOP_ASSERT"
:
SP
-
=
1
v
=
f
"STK_U64_{SP}"
source.append(f
"assert({v});"
)
elif
TYPE
in
[
"R_LARCH_SOP_POP_32_S_5_20"
,
"R_LARCH_SOP_POP_32_S_10_12"
,
"R_LARCH_SOP_POP_32_S_0_10_10_16_S2"
,
]:
SP
-
=
1
elif
TYPE
=
=
"R_LARCH_SOP_POP_32_U"
:
t
=
int
(OFFSET,
16
)
if
reloca_start <
=
t < reloca_end:
assert
t
in
addend_writable_addrs
modified_value_addrs.append(t)
SP
-
=
1
v
=
f
"STK_U64_{SP}"
source.append(f
"LOC_U32_{t:08X} = {v} & 0xffffffff;"
)
else
:
SP
-
=
1
elif
TYPE
=
=
"R_LARCH_ADD32"
:
pass
else
:
assert
False
, f
"Unknown TYPE {TYPE}"
for
i
in
range
(
4
):
print
(f
"uint64_t STK_U64_{i} = 0;"
)
print
()
for
i
in
modified_value_addrs:
print
(f
"uint32_t LOC_U32_{i:08X};"
)
print
()
for
i
in
source:
print
(i)