if
ins.mnemonic !
=
'mov'
and
ins.mnemonic.startswith(
'mov'
):
print
(
">>> branch 0x%x:\t%s\t%s"
%
(ins.address, ins.mnemonic, ins.op_str))
if
branch_control
=
=
1
:
vZ
=
(uc.reg_read(UC_ARM_REG_CPSR) &
0x40000000
) >>
30
vN
=
(uc.reg_read(UC_ARM_REG_CPSR) &
0x80000000
) >>
31
vV
=
(uc.reg_read(UC_ARM_REG_CPSR) &
0x10000000
) >>
28
if
ins.mnemonic
=
=
'moveq'
or
ins.mnemonic
=
=
'movne'
:
if
vZ
=
=
0
:
uc.reg_write(UC_ARM_REG_CPSR,uc.reg_read(UC_ARM_REG_CPSR) |
0x40000000
)
print
(
"Z 0->1 change cpsr = 0x%x"
%
uc.reg_read(UC_ARM_REG_CPSR))
else
:
uc.reg_write(UC_ARM_REG_CPSR,uc.reg_read(UC_ARM_REG_CPSR) &
0xBFFFFFFF
)
print
(
"Z 1->0 change cpsr = 0x%x"
%
uc.reg_read(UC_ARM_REG_CPSR))
elif
ins.mnemonic
=
=
'movgt'
:
if
vZ
=
=
0
and
vN
=
=
vV:
uc.reg_write(UC_ARM_REG_CPSR,uc.reg_read(UC_ARM_REG_CPSR) |
0x40000000
)
print
(
"GT 0->1 change cpsr = 0x%x"
%
uc.reg_read(UC_ARM_REG_CPSR))
else
:
uc.reg_write(UC_ARM_REG_CPSR,uc.reg_read(UC_ARM_REG_CPSR) &
0x2FFFFFFF
)
print
(
"GT 1->0 change cpsr = 0x%x"
%
uc.reg_read(UC_ARM_REG_CPSR))
elif
ins.mnemonic
=
=
'movlt'
:
if
vN !
=
vV :
uc.reg_write(UC_ARM_REG_CPSR,uc.reg_read(UC_ARM_REG_CPSR) &
0x6FFFFFFF
)
print
(
"lt != -> = change cpsr = 0x%x"
%
uc.reg_read(UC_ARM_REG_CPSR))
else
:
uc.reg_write(UC_ARM_REG_CPSR,uc.reg_read(UC_ARM_REG_CPSR) &
0xEFFFFFFF
)
print
(
"lt = -> != change cpsr = 0x%x"
%
uc.reg_read(UC_ARM_REG_CPSR))
else
:
print
(
">>> None "
+
ins.mnemonic)